Inverse Sine Phase Detector Phase Locked Loop Associated with Modified Multi Band LC Quadrature Voltage Controlled Oscillator for Wireless Communication Systems at 0.9, 1.8, 2.4, 3.5 GHz

Problem statement: In this study and in consequence of the restricted performance of the multi standard wireless receiver utilizing the classical architectures, we proposed and presented a new architecture of multi band wireless receiver based on an Inverse Sine Phase Detector Phase Locked Loop (ISPDPLL) associated with modified multi band LC quadrature Voltage Controlled Oscillator (VCO), supporting GSM/DCS/DECT/Bluetooth/WiMax systems. Approach: To accomplish the multi standard receiving architecture at sufficiently good performance and at a low hardware cost, the proposed circuit, using an ISPDPLL associated with VCO based on switched capacitors utilizing a several numeric controlled capacitive branch and cross-coupled transistors, was implemented in 0.35 μm CMOS technology and designed to yield quadrature output signals (I-Q) allowing to eliminate the dephasing block (90°) employed in a multi band Zero IF architecture receiver, that make the proposed architecture amenable for monolithic integration and 4G multi standard application. Results: This novel system presented high performance and good potentiality to cover perfectly the wireless multi standard receiving on the large band with the same transmission condition. Conclusion/Recommendations: The performance of this system was analyzed and demonstrated to have a minimum phase noise, a good Factor Of Merit (FOM) and wide tuning for these standard applications.